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Rigetti announces 80 qubit processor, experiments with “qutrits”


Image of a golden colored square with lots of attachment points for cables.
Enlarge / The Aspen-M 40-qubit chip and its housing.

Rigetti

On Wednesday, quantum computing startup Rigetti announced a number of interesting hardware developments. To begin with, its users would now have access to its next-generation chip, called Apsen-M, with 40 qubits and improved performance. While that’s well below the qubit count achieved by IBM, the company also hints at a way it can stay competitive: private testers will now have access to an 80 qubit version achieved by linking two of these chips together.

Separately, the company says that it is now experimenting with allowing testers to access a third energy state in its superconducting hardware, converting its qubits into “qutrits.” If these qutrits show consistent behavior, then they would allow the manipulation of significantly more data in existing hardware.

New and improved

For traditional processors, advances are typically measured in clock speed, core count, and energy use. For quantum computers, one of the most critical measures is error rate, since the qubits lose track of their state in a way that digital hardware doesn’t. With Aspen-M, Rigetti is claiming that a specific type of error—the readout of the state of the qubit—has been cut in half.

The analog to clock speed is how quickly you can get signals to the qubits that induce them to perform operations. Here, the company says there’s a 2.5x speedup. This is critical because qubits also tend to lose their state over time. The more operations you can squeeze into a given amount of time, the more likely you are to get a complex set of manipulations done before the processor loses its state.

All that, plus the increased qubit count, are the sorts of evolutionary improvements that have been typical of developments to date. The 80-qubit form of Aspen-M may represent a more significant advance, since Rigetti describes it as “assembled from two 40-qubit chips.”

Although they are quite tiny, qubits are pretty large compared to the features on traditional processing hardware. The signals that control and read and write data from the qubits also require larger connections to the processor. All of which means that there’s likely to be a limit to how many qubits we can stuff onto a single piece of hardware. Similar problems show up with alternative technologies like trapped ion qubits. For these reasons, a number of companies have already started talking about the need to bridge more than one individual chip in order to raise qubit counts.

If Rigetti has really solved this problem already, then it has cleared an important technical hurdle pretty early in its development. And, should its solution scale to more than two chips, it provides an obvious roadmap for getting qubit counts up rapidly.

Qutrits anyone?

Separate from the announcement, the company also put up a blog post in which it said that it was providing experimental access to a new way of configuring its hardware. All the commercial hardware available at present is built on qubits—hardware that can adopt values including two states and a superposition of all possibilities in between. Obviously, a three-state system provides significantly more information content.

So, why isn’t anyone using those? For transmons, the hardware used by Rigetti, IBM, and Google, the problem is that the energy levels of the states available beyond the first two are separated by ever-shrinking amounts of energy. So, while there’s a bit difference between 0 and 1, there’s a smaller difference between 1 and 2, and matters get worse from there. For hardware that’s already plagued by noise issues, it gets hard to exert the kind of control needed to get higher levels to work.

But Rigetti has now modified its control software to allow programmable access to one of the higher-energy states. We’ll have to wait for users to actually try out this system in order to determine whether it’s actually useful given the state of both our algorithms and the hardware.



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